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fujitsu microelectronics data sheet copyright?2008 fujitsu microelectr onics limited all rights reserved 2008.8 assp for power management applications 2 ch dc/dc converter ic built-in switching fet, synchronous rectification, and down conversion support mb39c015 description the mb39c015 is a current mode type 2- channel dc/dc converter ic built -in voltage detection, synchronous rectifier, and down conversion support. the device is inte grated with a switching fet, oscillator, error amplifier, pwm control circuit, reference voltage source, and voltage detection circuit. external inductor and decoupling capacitor are needed only for the external component. as combining with external parts enables a dc/dc converte r with a compact and high load response characteristic, this is suitable as the built-in power supply for such as mobile phone/pda, dvds, and hdds. features ? high efficiency : 96 % (max) output current (dc/dc) : 800 ma/ch (max) input voltage range : 2.5 v to 5.5 v operating frequency : 2.0 mhz (typ) no flyback diode needed low dropout operation : for 100 % on duty built-in high-precision reference voltage generator : 1.30 v 2 % consumption current in shutdown mode : 1 a or less built-in switching fet : p-ch mos 0.3 ? (typ) n-ch mos 0.2 ? (typ) high speed for input and load transi ent response in the current mode over temperature protection packaged in a compact package : qfn-24 applications flash roms mp3 players electronic dictionary devices surveillance cameras portable gps navigators dvd drives ip phones network hubs mobile phones etc. ds04-27254-2e
mb39c015 2 ds04-27254-2e pin assignment lx2 lx1 dgnd2 dgnd2 dgnd1 dgnd1 ctlp 19 20 21 22 23 24 12 11 10 9 8 7 123456 18 17 16 15 14 13 vref ctl2 ctl1 agnd avdd dvdd2 dvdd2 out2 mode2 vrefin2 xpor dvdd1 dvdd1 out1 mode1 vrefin1 vdet (top view) (lcc-24p-m09)
mb39c015 ds04-27254-2e 3 pin descriptions pin no. pin name i/o description 1ctlpi voltage detection circuit block control input pin. (l : voltage detection function stop / h : normal operation) 2/3 ctl2/ctl1 i dc/dc converter block control input pin. (l : shut down / h : normal operation) 4agnd ? control block ground pin. 5avdd ? control block power supply pin. 6 vref o reference voltage output pin. 7 vdet i voltage detection input pin. 8/23 vrefin1/vrefin2 i error amplifier (error amp) non-inverted input pin. 9/22 mode1/mode2 i use pin at l level or leave open. 10/21 out1/out2 i output voltage feedback pin. 11, 12/ 19, 20 dvdd1/dvdd2 ? drive block power supply pin. 13/18 lx1/lx2 o inductor connection output pin. high impedance durng shut down. 14, 15/ 16, 17 dgnd1/dgnd2 ? drive block ground pin. 24 xpor o vdet circuit output pin. connected to an n-ch mos open drain circuit.
mb39c015 4 ds04-27254-2e i/o pin equivalent circuit diagram gnd vdd lx1 , lx2 ? ? gnd vdd vref xpor ? gnd mode1 , mode2 ? gnd vdd ? ? gnd vdd ctl1 , ctl2 , ctlp gnd vdd ? ? vrefin1 , vrefin2 , vdet out1 , out2 ? ? * : esd protection device
mb39c015 ds04-27254-2e 5 block diagram 3 ? + ? + v in dvdd2 11, 12 19, 20 dvdd1 avdd vout1 v in xpor 5 16, 17 dgnd2 14, 15 dgnd1 agnd 4 on/off on/off on/off ctl1 out1 3 10 8 vrefin1 dac gnd 9 1 7 mode1 vdet ctlp ctl2 out2 v in dvdd1 i out comparator err amplifier err amplifier pwm logic control 3 ? + dvdd2 i out comparator pwm logic control lx1 13 vout2 lx2 18 24 1.30 v v ref vref vrefin2 mode2 gnd 6 21 2 23 22
mb39c015 6 ds04-27254-2e ? current mode original voltage mode type : stabilize the output voltage by comparing two items below and on-duty control. - voltage (v c ) obtained through negative feedback of the output voltage by error amp - reference triangular wave (v tri ) current mode type : instead of the triangular wave (v tri ), the voltage (v idet ) obtained through i-v conversion of the sum of currents that flow in the oscillator (rectangular wa ve generation circuit) and sw fet is used. stabilize the output voltage by comparing two items below and on-duty control. - voltage (v c ) obtained through negative feedback of the output voltage by error amp - voltage (v idet ) obtained through i-v conversion of the sum of cu rrent that flow in the oscillator (rectangular wave generation circuit) and sw fet v in ton toff v tri vc vc v tri v in toff vc vc v idet s r ton sr-ff v idet q ? + ? + voltage mode type model current mode type model oscillator note : the above models illustrate the general operation and an actual operation will be preferred in the ic.
mb39c015 ds04-27254-2e 7 function of each block pwm logic control circuit the built-in p-ch and n-ch mos fets are controlled for synchronization rectification according to the frequency (2.0 mhz) oscillated from the built-in osc illator (square wave oscillation circuit). i out comparator circuit this circuit detects the current (i lx ) which flows to the external inductor from the built-in p-ch mos fet. by comparing v idet obtained through i-v conversion of peak current i pk of i lx with the error amp output, the built- in p-ch mos fet is turned off via the pwm logic control circuit. error amp phase compensation circuit this circuit compares the output voltage to referenc e voltages such as vref. this ic has a built-in phase compensation circuit that is designed to optimize the operation of this ic. this needs neither to be considered nor addition of a pha se compensation circuit and an external phase com- pensation device. vref circuit a high accuracy reference voltage is generated with bgr (bandgap refere nce) circuit. the output voltage is 1.30 v (typ). voltage detection (vdet) circuit the voltage detection circuit monitors the voltage at the vdet pin. normally, use the xpor pin through pull-up with an external resistor. when the v det pin voltage reaches 0.6 v, it reaches the h level. timing chart example : (xpor pin pulled up to vin) protection circuit this ic has a built-in over-temperature protection circuit. the over-temperature protection circuit turns off both n-ch and p-ch switchi ng fets when the junction temperature reaches + 135 c. when the junction temperature comes down to + 110 c, the switching fet is returned to the normal operation. sinc e the pwm control circuit of this ic is in the control method in current mode, the current peak value is also monitored and controlled as required. vin ctlp vdet xpor v uvlo v thhpr v thlpr v uvlo : uvlo threshold voltage v thhpr , v thlpr : xpor threshold voltage
mb39c015 8 ds04-27254-2e function table mode input output ctl1 ctl2 ctlp ch1 function ch2 function vdet function vref function shutdown mode l stopped operating mode h l l functional stopped stopped outputs 1.3 v l h l stopped functional stopped l l h stopped stopped functional h h l functional functional stopped l h h stopped functional functional h l h functional stopped functional h functional
mb39c015 ds04-27254-2e 9 absolute maximum ratings *1 : power dissipation value between + 25 c and + 85 c is obtained by connecting these two points with straight line. *2 : when mounted on a four-lay er epoxy board of 11.7 cm 8.4 cm *3 : connection at exposure pad with thermal via. (thermal via 9 holes) *4 : connection at exposure pad, without a thermal via. notes: ? the use of negative voltages below ? 0.3 v to the agnd, dgnd1, and dgnd2 pin may create parasitic transistors on lsi lines, which can cause abnormal operation. ? this device can be damaged if the lx pins are sh ort-circuited to avdd and dvdd1/dvdd2, or agnd and dgnd1/dgnd2. warning: semiconductor devices can be permanently dama ged by application of stress (voltage, current, temperature, etc.) in excess of absolute ma ximum ratings. do not exceed these ratings. parameter symbol condition rating unit min max power supply voltage v dd avdd = dvdd1 = dvdd2 ? 0.3 + 6.0 v signal input voltage v isig out1/out2 pins ? 0.3 v dd + 0.3 v ctlp, ctl1/ctl2, mode1/mode2 pins ? 0.3 v dd + 0.3 vrefin1/vrefin2 pins ? 0.3 v dd + 0.3 vdet pin ? 0.3 v dd + 0.3 xpor pull-up voltage v ixpor xpor pin ? 0.3 + 6.0 v lx voltage v lx lx1/lx2 pins ? 0.3 v dd + 0.3 v lx peak current i pk i lx1 /i lx2 ? 1.8 a power dissipation p d ta + 25 c ? 3125* 1 , * 2 , * 3 mw ? 1563* 1 , * 2 , * 4 ta = + 85 c ? 1250* 1 , * 2 , * 3 mw ? 625* 1 , * 2 , * 4 operating ambient temperature ta ?? 40 + 85 c storage temperature t stg ?? 55 + 125 c
mb39c015 10 ds04-27254-2e recommended operating conditions note : the output current from this device has a situation to decrease if the power supply voltage (v in ) and the dc/dc converter output voltage (v out ) differ only by a small amount. this is a result of slope compensation and will not damage this device. warning: the recommended operating co nditions are required in order to ensure the normal operation of the semiconductor device. all of the device's el ectrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operat ing conditions, or combinations not represented on the data sheet. users considering application outs ide the listed conditions are advised to contact their representatives beforehand. parameter symbol condition value unit min typ max power supply voltage v dd avdd = dvdd1 = dvdd2 2.5 3.7 5.5 v vrefin voltage v refin ? 0.15 ? 1.30 v ctl voltage v ctl ctlp, ctl1, ctl2 0 ? 5.0 v lx current i lx i lx1 /i lx2 ?? 800 ma vref output current i rout 2.5 v avdd = dvdd1 = dvdd2 < 3.0 v ?? 0.5 ma 3.0 v avdd = dvdd1 = dvdd2 5.5 v ?? 1 xpor current i por ??? 1ma inductor value l ?? 2.2 ? h
mb39c015 ds04-27254-2e 11 electrical characteristics (ta = + 25 c, avdd = dvdd1 = dvdd2 = 3.7 v, vout1/vout2 setting value = 2.5 v, mode1/mode2 = 0 v) * : standard design value (continued) parameter sym- bol pin no. condition value unit min typ max dc/dc converter block input current i refin 8, 23 vrefin = 0.15 v to 1.3 v ? 100 0 + 100 na output voltage v out 10, 21 vrefin = 0.833 v, out = ? 100 ma 2.45 2.50 2.55 v input stability line 2.5 v avdd = dvdd1 = dvdd2 5.5 v* 1 ?? 10 mv load stability load ? 100 ma out ? 800 ma ?? 10 mv out pin input impedance r out out = 2.0 v 0.6 1.0 1.5 m ? lx peak current i pk 13, 18 output shorted to gnd 0.9 1.2 1.7 a oscillation frequency fosc ? 1.6 2.0 2.4 mhz rise delay time t pg 2, 3, 10, 21 c1/c2 = 4.7 f, out = 0 a, out1/out2 : 0 90 % v out ? 45 80 s sw nmos-fet off voltage v noff 13, 18 ?? ? 10* ? mv sw pmos-fet on resistance r onp lx1/lx2 = ? 100 ma ? 0.30 0.48 ? sw nmos-fet on resistance r onn lx1/lx2 = ? 100 ma ? 0.20 0.42 ? lx leak current i leakm 0 lx vdd* 2 ? 1.0 ? + 8.0 a i leakh vdd = 5.5 v, 0 lx vdd* 2 ? 2.0 ? + 16.0 a protection circuit block overheating protection (junction temp.) t otph ?? + 120* + 135* + 160* c t otpl + 95* + 110* + 125* c uvlo threshold voltage v thhuv 5, 11, 12, 19, 20 ? 2.17 2.30 2.43 v v thluv 2.03 2.15 2.27 v uvlo hysteresis width v hysuv ? 0.08 0.15 0.25 v voltage detection circuit block xpor threshold voltage v thhpr 7 ? 575 600 625 mv v thlpr 558 583 608 mv xpor hysteresis width v hyspr ?? 17 ? mv xpor output voltage v ol 24 xpor = 25 a ?? 0.1 v xpor output current i oh xpor = 5.5 v ?? 1.0 a
mb39c015 12 ds04-27254-2e (continued) (ta = + 25 c, avdd = dvdd1 = dvdd2 = 3.7 v, vout1/vout2 setting value = 2.5 v, mode1/mode2 = 0 v) *1 : the minimum value of avdd = dvdd1 = dvdd2 is the 2.5 v or vout setting value + 0.6 v, whichever is higher. *2 : the + leak at the lx pin includes t he current of the internal circuit. *3 : sum of the current flowing into the avdd, the dvdd1, and the dvdd2 pins. *4 : current consumption based on 100% on-duty (high side fet in full on stat e). the sw fet gate drive current is not included because the device is in full on state (no sw itching operation). also the load current is not included. parameter symbol pin no. condition value unit min typ max control block ctl threshold voltage v thhct 1, 2, 3 ? 0.55 0.95 1.45 v v thlct ? 0.40 0.80 1.30 v ctl pin input current i ictl 0 v ctlp/ctl1/ctl2/ 3.7 v ?? 1.0 a reference voltage block vref voltage v ref 6 vref = 0 ma 1.274 1.300 1.326 v vref load stability l oadref vref = ? 1.0 ma ?? 20 mv general shut down power supply current i vdd1 5, 11, 12, 19, 20 ctlp/ctl1/ctl2 = 0 v state of all circuits off* 3 ?? 1.0 a i vdd1h ctlp/ctl1/ctl2 = 0 v, vdd = 5.5 v state of all circuits off* 3 ?? 1.0 a power supply current (dc/dc mode) i vdd31 1. ctlp = 0 v, ctl1 = 3.7 v, ctl2 = 0 v 2. ctlp = 0 v, ctl1 = 0 v, ctl2 = 3.7 v out = 0 a ? 3.5 10 ma i vdd32 ctlp = 0 v, ctl1/ctl2 = 3.7 v, out = 0 a ? 7.0 20.0 ma power supply current (voltage detection mode) i vdd5 ctlp = 3.7 v, ctl1/ctl2 = 0 v, ? 15 24 a power-on invalid current i vdd 1. ctl1 = 3.7 v, ctl2 = 0 v 2. ctl1 = 0 v, ctl2 = 3.7 v vout1/vout2 = 90 % out = 0 a* 4 ? 1000 2000 a
mb39c015 ds04-27254-2e 13 test circuit for measuring typical operating characteristics note : these components are recommended based on the operating tests authorized. tdk : tdk corporation ssm : susumu co., ltd koa : koa corporation component specification vendor part number remarks r1 1 m ? koa rk73g1jttd d 1 m ? r3-1 r3-2 20 k ? 150 k ? ssm ssm rr0816-203-d rr0816-154-d vout1/vout2 = 2.5 v setting r4 300 k ? ssm rr0816-304-d r5 510 k ? koa rk73g1jttd d 510 k ? r6 100 k ? ssm rr0816-104-d c1 4.7 f tdk c2012jb1a475k c2 4.7 f tdk c2012jb1a475k c3 0.1 f tdk c1608jb1e104k c6 0.1 f tdk c1608jb1h104k for adjusting slow start time l1 2.2 h tdk vlf4012at-2r2m vin vout1/ vout2 l1 c1 i out c2 sw ctl1/ctl2 mode1/mode2 vref vrefin1/vrefin2 agnd out1/out2 avdd lx1/lx2 dvdd1/dvdd2 gnd r1 v dd v dd mb39c015 dgnd1/dgnd2 vdet r4 r5 r6 c6 c3 r3-1 r3-2 output voltage = vrefin 3.01
mb39c015 14 ds04-27254-2e application notes [1] selection of components ? selection of an external inductor basically it dose not need to desi gn inductor. this ic is designed to operate efficiently with a 2.2 h inductor. the inductor should be rated for a saturation current higher than the lx peak current value during normal operating conditions, and should have a minimal dc resistance. (100 m ? or less is recommended.) lx peak current value i pk is obtained by the following formula. l : external inductor value i out : load current v in : power supply voltage v out : output setting voltage d : on-duty to be switched ( = v out /v in ) fosc : switching frequency (2 mhz) ex) when v in = 3.7 v, v out = 2.5 v, i out = 0.8 a, l = 2.2 h, fosc = 2.0 mhz the maximum peak current value i pk ; i/o capacitor selection select a low equivalent series resistance (esr) for the vdd input capacitor to suppress dissipation from ripple currents. also select a low equivalent series resistance (esr) for the output capacitor. the variation in the inductor current causes ripple currents on the output capacitor which, in turn, causes ri pple voltages an output equal to the amount of variation multiplied by the esr valu e. the output capacitor value has a significant impact on the operating stability of the device when used as a dc/dc converter. therefore, fujitsu microelec- tronics generally recommends a 4.7 f capacitor, or a larger capacitor value can be used if ripple voltages are not suitable. if the v in /v out voltage difference is within 0.6 v, the use of a 10 f output capacitor value is recommended. types of capacitors ceramic capacitors are effective for reducing the es r and afford smaller dc/dc converter circuit. however, power supply functions as a heat generator, therefore av oid to use capacitor with the f-temperature rating ( ? 80 % to + 20 % ) . fujitsu microelectronics recommends capacitors with the b-temperature rating ( 10 % to 20 % ). normal electrolytic capacitors are not recommended due to their high esr. tantalum capacitor will reduce esr, however, it is dangerous to use because it turns into short mode when damaged. if you insist on using a tantalum capacitor , fujitsu microelectronics recommends the type with an internal fuse. i pk = i out + v in ? v out d 1 = i out + (v in ? v out ) v out l fosc 2 2 l fosc v in i pk = i out + (v in ? v out ) v out = 0.8 a + (3.7 v ? 2.5 v) 2.5 v : = 0.89 a 2 l fosc v in 2 2.2 h 2 mhz 3.7 v
mb39c015 ds04-27254-2e 15 [2] output voltage setting the output voltage v out (v out1 or v out2 ) of this ic is defined by the vo ltage input to vrefin (vrefin1 or vrefin2) . supply the voltage for inputting to vrefin from an external power supply, or set the vref output by dividing it with resistors. the output voltage when the vrefin vo ltage is set by dividing the vref voltage with resistors is shown in the following formula. note : refer to ? application circuit examples? for the an example of this circuit. although the output voltage is defined according to the divi ding ratio of resistance, select the resistance value so that the current flowing through the resistance does not exceed the vref current rating (1 ma) . [3] about conversion efficiency the conversion efficiency can be improved by reducing the loss of the dc/dc converter circuit. the total loss (p loss ) of the dc/dc converter is roughly divided as follows : p loss = p cont + p sw + p c p cont : control system circuit loss (the power used for this ic to operate, including the the gate driving power for internal sw fets) p sw : switching loss (the loss caused during sw itching of the ic's internal sw fets) p c : continuity loss (the loss caused when currents flow through the ic's internal sw fets and external circuits ) the ic's control circuit loss (p cont ) is extremely small, less than 100 mw (with no load). as the ic contains fets which can switch fast er with less power, the continuity loss (p c ) is more predominant as the loss during heavy-load operatio n than the control circuit loss (p cont ) and switching loss (p sw ) . furthermore, the continuity loss (p c ) is divided roughly into the loss by internal sw fet on-resistance and by external inductor series resistance. v out = 3.01 v refin , v refin = r2 v ref r1 + r2 (v ref = 1.30 v) r2 r1 vref vrefin vref vrefin mb39c015
mb39c015 16 ds04-27254-2e p c = i out 2 (rdc + d r onp + (1 ? d) r onn ) d : switching on-duty cycle ( = v out / v in ) r onp : internal p-ch sw fet on resistance r onn : internal n-ch sw fet on resistance rdc : external inductor series resistance i out : load current the above formula indicates that it is important to reduce rdc as much as possible to improve efficiency by selecting components. [4] power dissipation and heat considerations the ic is so efficient that no consideration is required in most cases. however, if the ic is used at a low power supply voltage, heavy load, high output voltage, or high temperature, it requires further consideration for higher efficiency. the internal loss (p) is roughly obtained from the following formula : p = i out 2 (d r onp + (1 ? d) r onn ) d : switching on-duty cycle ( = v out / v in ) r onp : internal p-ch sw fet on resistance r onn : internal n-ch sw fet on resistance i out : output current the loss expressed by the above formula is mainly contin uity loss. the internal loss includes the switching loss and the control circuit loss as well but they are so sma ll compared to the continuity loss they can be ignored. in this ic with r onp greater than r onn , the larger the on-duty cycle, the greater the loss. when assuming v in = 3.7 v, ta = + 70 c, for example, r onp = 0.36 ? and r onn = 0.30 ? according to the graph ?mos fet on resistance vs. operating ambient temp erature?. the ic's internal loss p is 123 mw at v out = 2.5 v and i out = 0.6 a. according to the graph ?power diss ipation vs. operating ambient temperature?, the power dissipation at an operat ing ambient temperature ta of + 70 c is 300 mw and the internal loss is smaller than the power dissipation.
mb39c015 ds04-27254-2e 17 [5] xpor threshold voltage setting [v porh , v porl ] set the detection voltage by applying vo ltage to the vdet pin via an external resistor calculated according to this formula. v thhpr = 0.600 v v thlpr = 0.583 v example for setting detection voltage to 3.7 v r3 = 510 k ? r4 = 100 k ? v porh = r3 + r4 v thhpr r4 v porl = r3 + r4 v thlpr r4 v porh = 510 k ? + 100 k ? 0.600 = 3.66 : = 3.7 [v] 100 k ? v porl = 510 k ? + 100 k ? 0.583 = 3.56 : = 3.6 [v] 100 k ? r4 r3 1 m ? vin xpor avdd mb39c015 xpor vdet
mb39c015 18 ds04-27254-2e [6] transient response normally, i out is suddenly changed while v in and v out are maintained constant, responsiveness including the response time and overshoot/undershoot voltage is checked. as this ic ha s built-in error amp with an optimized design, it shows good transient response characterist ics. however, if ringing upon sudden change of the load is high due to the operating cond itions, add capacitor c6 (e.g. 0.1 f). (since this capacitor c6 changes the start time, check the start waveform as well. ) this action is not required for dac input. r2 r1 vref vrefin vref vrefin1/ vrefin2 mb39c015 c6
mb39c015 ds04-27254-2e 19 [7] board layout, design example the board layout needs to be designed to ensure the stable operation of this ic. follow the procedure below for designing the layout. arrange the input capacitor (cin) as close as possible to both the vdd and gnd pins. make a thru-hole (th) near the pins of this capacitor if t he board has planes for power and gnd. large ac currents flow between this ic and the input capacitor (cin), output capacitor (co), and external inductor (l). group these components as close as possib le to this ic to reduce the overall loop area occupied by this group. also try to mount these components on the same surface and arrange wiring without thru-hole wiring. use thick, short, and stra ight routes to wire the net (the layout by planes is recommended.). arrange a bypass capacitor for avdd as close as pos sible to both the advv and agnd pins. make a thru-hole (th) near the pins of this capaci tor if the board has planes for power and gnd. the feedback wiring to the out should be wired from the voltage output pin closest to the output capacitor (co). the out pin is extremely sensitive and should thus be kept wired away from the lx pin of this ic as far as possible. if applying voltage to the vrefin1/vref in2 pins through dividing resistors, arrange the resistors so that the wiring can be kept as short as possible. also arrange t hem so that the gnd pin of vrefin1/vrefin2 resistor is close to the ic's agnd pin. further, provide a gnd ex clusively for the control line so that the resistor can be connected via a path that does not carry current. if in stalling a bypass capacitor for the vrefin, put it close to the vrefin pin. if applying voltage to the vdet pin through dividing resi stors, arrange the resistors so that the wiring can be kept as short as possible. also arrange so that the gn d pin of the vdet resistor is close to the ic's agnd pin. further, provide a gnd exclusively for the control line so that the resistor can be connected via a path that does not carry current. try to make a gnd plane on the surface to which this ic will be mounted. for ef ficient heat dissipation when using the qfn-24 package, fujitsu microelectroni cs recommends providing a thermal via in the footprint of the thermal pad. ? example of arranging ic sw system parts cin vin gnd cin vin co co gnd vin 1pin l l feedback line feedback line avdd bypass capacitor
mb39c015 20 ds04-27254-2e notes for circuit design the switching operation of this ic works by monitoring and controlling the peak curr ent which, incidentally, serves as a form of short-circuit protection. however, do not leave the output short- circuited for long periods of time. if the output is short-circuited where v in < 2.9 v, the current limit value (peak current to the inductor) tends to rise. leaving in the short-circuit state, the temperatur e of this ic will continue ri sing and activate the thermal protection. once the thermal protection stops the output, the tem perature of the ic will go down and operation will be restarted, after which the output will repeat the starting and stopping. although this effect will not destroy the ic, the therma l exposure to the ic over prolonged hours may affect the peripherals surrounding it.
mb39c015 ds04-27254-2e 21 example of standard operation characteristics (shown below is an example of characteristics for connection according to ? test circuit for measuring typical operating characteristics?.) characteristics ch1 (continued) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 ta = + 25 c v out = 1.2 v v in = 3.7 v v in = 3.0 v v in = 4.2 v v in = 5.0 v 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 v in = 3.7 v v in = 4.2 v v in = 3.0 v ta = + 25 c v out = 1.8 v v in = 5.0 v 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 ta = + 25 c v out = 3.3 v v in = 3.7 v v in = 4.2 v v in = 5.0 v 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 v in = 3.7 v v in = 4.2 v v in = 3.0 v ta = + 25 c v out = 2.5 v v in = 5.0 v load current i out (ma) conversion efficiency ( % ) load current i out (ma) conversion efficiency ( % ) load current i out (ma) conversion efficiency ( % ) load current i out (ma) conversion efficiency ( % ) conversion efficiency vs. load current conversion efficiency vs. load current conversion efficiency vs. load current conversion efficiency vs. load current
mb39c015 22 ds04-27254-2e (continued) 2.40 2.0 3 .0 4.0 5.0 6.0 2.42 2.44 2.46 2.4 8 2.50 2.52 2.54 2.56 2.5 8 2.60 i out = 0 a i out = 100 ma 2.40 0 200 400 600 8 00 2.42 2.44 2.46 2.4 8 2.50 2.52 2.54 2.56 2.5 8 2.60 2.0 3.0 4.0 5.0 6.0 1.20 1.22 1.24 1.26 1.28 1.30 1.32 1.34 1.36 1.38 1.40 i out = 0 a i out = 100 ma v out = 2.5 v ta = + 25 c ? 50 0 +50 +100 1.20 1.22 1.24 1.26 1.2 8 1. 3 0 1. 3 2 1. 3 4 1. 3 6 1. 38 1.40 v out = 2.5 v i out = 0 v v in = 3 .7 v input voltage v in (v) output voltage v out (v) load current i out (ma) output voltage v out (v) output voltage vs. input voltage output voltage vs. load current ta = + 25 c v out = 2.5 v setting ta = + 25 c v in = 3.7 v v out = 2.5 v setting reference voltage vs. input voltage reference voltage v ref (v) reference voltage vs. operating ambient temperature reference voltage v ref (v) input voltage v in (v) operating ambient temperature ta ( c)
mb39c015 ds04-27254-2e 23 (continued) 0 2.0 3.0 4.0 5.0 6.0 1 2 3 4 5 6 7 8 9 10 v out = 2.5 v ta = + 25 c ? 50 0 +50 +100 0 1 2 3 4 5 6 7 8 9 10 v out = 2.5 v v in = 3 .7 v 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.0 3.0 4.0 5.0 6.0 ta = + 25 c v out = 1.8 v i out = 100 ma 1.6 1. 8 1.7 1.9 2.0 2.1 2.2 2. 3 2.4 ? 50 0 +50 +100 i out = 100 ma v out = 2.5 v v in = 3 .7 v input current vs. operating ambient temperature input current i in (ma) input current vs. input voltage input current i in (ma) operating ambient temperature ta ( c) input voltage v in (v) input voltage v in (v) oscillation frequency f osc (mhz) operating ambient temperature ta ( c) oscillation frequency f osc (mhz) oscillation frequency vs. input voltage oscillation frequency vs. operating ambient temperature
mb39c015 24 ds04-27254-2e (continued) 2.0 3.0 4.0 5.0 6.0 0 0.1 0.2 0.3 0.4 0.5 0.6 ta = + 25 c p-ch n-ch ? 50 0 +50 +100 0 0.1 0.2 0. 3 0.4 0.5 0.6 v in = 3 .7 v v in = 5.5 v ? 50 0 +50 +100 0 0.1 0.2 0. 3 0.4 0.5 0.6 v in = 3 .7 v v in = 5.5 v input voltage v in (v) mos fet on resistance r on ( ? ) operating ambient temperature ta ( c) p-ch mos fet on resistance r onp ( ? ) operating ambient temperature ta ( c) n-ch mos fet on resistance r onn ( ? ) mos fet on resistance vs. input voltage p-ch mos fet on resistance vs. operating ambient temperature n-ch mos fet on resistance vs. operating ambient temperature
mb39c015 ds04-27254-2e 25 (continued) 2.0 3 .0 4.0 5.0 6.0 0.0 0.4 0.2 0.6 0. 8 1.0 1.2 1.4 t a = + 25 c v out = 2.5 v v thlct v thhct 0.0 1.0 2.0 3 .0 4.0 5.0 6.0 2.0 3 .0 4.0 5.0 6.0 t a = + 25 c v porh = 3 .7 v s etting v xporh v xporl ? 50 0 +50 + 8 5 +100 0 1000 500 1500 1250 3 125 2000 2500 3 000 3 500 ? 50 0 +50 + 8 5 +100 0 1000 500 1500 625 156 3 2000 2500 3 000 3 500 operating ambient temperature ta ( c) power dissipation p d (mw) operating ambient temperature ta ( c) power dissipation p d (mw) power dissipation vs. operating ambient temperature (with thermal via) power dissipation vs. operating ambient temperature (without thermal via) input voltage v in (v) ctl threshold voltage v th (v) ctl threshold voltage v th vs. input voltage v thhct : circuit off on v thlct : circuit on off input voltage v in (v) xpor output voltage v xpor (v) xpor output voltage v xpor vs. input voltage
mb39c015 26 ds04-27254-2e switching waveforms i lx : 500 ma/div v lx : 2.0 v/div v out : 20 mv/div t a = + 25 c v in = 3 .7 v v out = 2.5 v i out = 8 00 ma 1 s /div
mb39c015 ds04-27254-2e 27 startup waveform v ctl : 5.0 v/div i lx : 500 ma/div v out : 1.0 v/div 10 m s /div t a = + 25 c v in = 3 .7 v v out = 2.5 v i out = 0 a vrefin capacitor value = 0.1 f v ctl : 2.0 v/div i lx : 500 ma/div v out : 1.0 v/div ta = + 25 c v in = 3.7 v v out = 2.5 v i out = 0 a 10 s/div no vrefin capacitor
mb39c015 28 ds04-27254-2e output waveforms at sudden load changes (0 ma ? 800 ma) output waveforms at s udden load changes (100 ma ? 800 ma) v out : 100 mv/div ta = + 25 c v in = 3.7 v v out = 2.5 v i out = 0 ma i out = 0 ma i out = 800 ma 10 s/div vrefin capacitor value = 0.1 f ta = + 25 c v in = 3.7 v v out = 2.5 v i out = 100 ma i out = 800 ma i out = 100 ma v out : 100 mv/div 10 s/div vrefin capacitor value = 0.1 f
mb39c015 ds04-27254-2e 29 application circuit examples application circuit example 1 an external voltage is input to the reference volt age external input (vrefin1, vrefin2) , and the v out voltage is set to 3.01 times the v out setting gain. v in cpu v out1 dac1 l1 2.2 h l2 2.2 h 4.7 f c1 4.7 f c2 mb39c015 c3 4.7 f 4.7 f ctl1 mode1 vrefin1 out1 xpor lx1 dvdd1 r8 1 m ? r7 1 m ? ctl2 mode2 vref vrefin2 vdet ctlp dvdd2 dgnd1 dgnd2 c4 0.1 f c5 avdd agnd out2 lx2 dac2 apli2 v out2 v out = 3.01 v refin 3 8 2 23 9 22 6 7 1 24 21 18 10 13 4 5 16 17 19 20 14 15 11 12 apli1
mb39c015 30 ds04-27254-2e application circuit example 2 the voltage of vref pin is input to the reference voltage external input (vrefin1, vrefin2) by dividing resistors. the v out1 voltage is set to 2.5 v and v out2 voltage is set to 1.8 v. r8 1 m ? r6 300 k ? r2 r5 ( 22 k ? + 330 k ? ) 352 k ? r1 ( 20 k ? + 150 k ? ) 170 k ? 300 k ? r7 1 m ? cpu mb39c015 ctl1 vref vrefin1 ctl2 mode2 mode1 vrefin2 ctlp 3 8 2 23 6 9 22 1 v in c3 4.7 f 4.7 f dvdd1 dvdd2 dgnd1 dgnd2 c4 0.1 f c5 avdd agnd 4 5 16 17 19 20 14 15 11 12 out1 xpor lx1 out2 lx2 v out1 l1 2.2 h l2 2.2 h 4.7 f c1 4.7 f c2 apli2 v out2 24 21 18 10 13 apli1 v out1 = 3.01 v refin1 ( v ref = 1.30 v ) v ref v refin1 = r2 r1 + r2 1.30 v = 2.5 v v out1 = 3.01 300 k ? 170 k ? + 300 k ? 1.30 v = 1.8 v v out12 = 3.01 300 k ? 352 k ? + 300 k ?
mb39c015 ds04-27254-2e 31 application circuit exa mple components list tdk : tdk corporation fdk : fdk corporation koa : koa corporation component item part number specification package vendor l1 inductor vlf4012at-2r2m 2.2 h, rdc = 76 m ? smd tdk mipw3226d2r2m 2.2 h, rdc = 100 m ? smd fdk l2 inductor vlf4012at-2r2m 2.2 h, rdc = 76 m ? smd tdk mipw3226d2r2m 2.2 h, rdc = 100 m ? smd fdk c1 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c2 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c3 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c4 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c5 ceramic capacitor c1608jb1e104k 0.1 f (50 v) 2012 tdk r1 resister rk73g1jttd d 20 k ? rk73g1jttd d 150 k ? 20 k ? 150 k ? 1608 1608 koa koa r2 resister rk73g1jttd d 300 k ? 300 k ? 1608 koa r5 resister rk73g1jttd d 22 k ? rk73g1jttd d 330 k ? 22 k ? 330 k ? 1608 1608 koa koa r6 resister rk73g1jttd d 300 k ? 300 k ? 1608 koa r7 resister rk73g1jttd d 1 m ? 1 m ? 0.5 % 1608 koa r8 resister rk73g1jttd d 1 m ? 1 m ? 0.5 % 1608 koa
mb39c015 32 ds04-27254-2e usage precautions 1. do not configure the ic over the maximum ratings lf the lc is used over the maximum ratings, the lsl may be permanently damaged. it is preferable for the device to normally operate within the recommended usage conditions. usage outside of these conditions adversely affect the reliability of the lsi. 2. use the devices within recommended operating conditions the recommended operating conditions are the conditions under which the lsl is guaranteed to operate. the electrical ratings are guaranteed when the devi ce is used within the recommended operating conditions and under the conditions stated for each item. 3. printed circuit board ground lines should be set up with consideration for common impedance 4. take appropriate static electricity measures containers for semiconductor materials should have anti- static protection or be made of conductive material. after mounting, printed circuit boards should be stored and shipped in conductive bags or containers. work platforms, tools, and instruments should be properly grounded. working personnel should be gro unded with resistance of 250 k ? to 1 m ? between body and ground. 5. do not apply negative voltages the use of negative voltages below ? 0.3 v may create parasitic transisto rs on lsi lines, which can cause abnormal operation. ordering information rohs compliance information of lead (pb) free version the lsi products of fujitsu microelectronics with ?e1? are compliant with rohs directive, and has observed the standard of lead, cadmium, mercury, he xavalent chromium, polybrominated biphenyls (pbb) , and polybrominated diphenyl ethers (pbde). a product whose part number has traili ng characters ?e1? is rohs compliant. part number package remarks mb39c015qn- ??? e1 24-pin plastic qfn (lcc-24p-m09) lead-free version
mb39c015 ds04-27254-2e 33 marking format (lead free version) labeling sample (lead free version) index e1x xxxxx lead-free version lead-free mark jeita logo jedec logo the part number of a lead-free product has the trailing characters ?e1?.
mb39c015 34 ds04-27254-2e mb39c015qn- ??? e1 recommended conditions of moisture sensitivity level [fujitsu microelectronics r ecommended mounting conditions] [parameters for each mounting method] ir (infrared reflow) item condition mounting method ir (infrared reflow) mounting times 2 times storage period before opening please use it within two years after manufacture. from opening to the 2nd reflow storage conditions 5 c to 30 c, 70 % rh or less (the lowest possible humidity) 260 c (e) (d') (d) 255 c 170 c 190 c rt ( b ) ( a ) (c) to note : temperature : the top of the package body (a) temperature increase gradient : average 1 c/s to 4 c/s (b) preliminary heating : temperature 170 c to 190 c, 60s to 180s (c) temperature increase gradient : average 1 c/s to 4 c/s (d) actual heating : temperature 260 c max; 255 c or more, 10s or less (d?) : temperature 230 c or more, 40s or less or temperature 225 c or more, 60s or less or temperature 220 c or more, 80s or less (e) cooling : natural cooling or forced cooling h rank : 260 c max
mb39c015 ds04-27254-2e 35 evaluation board specification the mb39c015 evaluation board provides the proper fo r evaluating the efficiency and other characteristics of the mb39c015. terminal information symbol functions vin power supply terminal in standard condition 3.1 v to 5.5 v* * : when the vin/vout difference is to be held within 0.6 v or less, such as for devices with a standard output voltage (vout1 = 2.5 v) when vin < 3.1 v, fujitsu micro- electronics recommends changing the output capacity (c1, c2) to 10 f. vout1, vout2 output terminals (vout1: ch1, vout2: ch2) vctl power supply terminal for setting the ctl1, ctl2 and ctlp terminals. use by connecting wi th ctl1,ctl2 and ctlp. ctl1, ctl2 direct supply terminal of ctl (c tl1 : for ch1, ctl2 : for ch2) ctl1, ctl2 = 0 v to 0.8 v (typ.) : shutdown ctl1, ctl2 = 0.95 v (typ.) to v in (5 v max) : normal operation mode1, mode2 test terminal mode1, mode2 = open or gnd vref reference voltage output terminal vref = 1.30 v (typ.) vrefin1, vrefin2 external reference voltage input terminals (vrefin1 : for ch1, vrefin2 : for ch2) when an external reference voltage is supplied, connect it to the terminal for each chan- nel. vdet voltage input termi nal for voltage detection ctlp voltage detection circui t block control terminal ctlp = l : voltage detection circuit block stop ctlp = h : normal operation xpor voltage detection circuit output terminal the n-ch mos open drain circuit is connected. vxpor pull-up voltage terminal for the xpor terminal pgnd ground terminal connect power supply gnd to the pgnd terminal next to the vin terminal. connect output (load) gnd to the pgnd terminal between t he vout1 terminal and the vout2 terminal. agnd ground terminal
mb39c015 36 ds04-27254-2e startup terminal information jumper information setup and checkup (1) setup (1) -1. connect the ctl1 terminal and t he ctl2 terminal to the vctl terminal. (1) -2. put it into ?l? state by connec ting the ctlp terminal to the agnd pad. (1) -3. connect the power supply terminal to the vin te rminal, and the power supply gnd terminal to the pgnd terminal. make sure pgnd is connected to t he pgnd terminal next to the vin terminal. (example of setting power-supply voltage : 3.7 v) ( 2 ) checkup supply power to vin. the ic is operating normally if vout1 = 2.5 v (typ) and vout2 = 1.8 v (typ). terminal name condition functions ctl1 l : open h : connect to vctl on/off switch for ch1 l : shutdown h : normal operation. ctl2 l : open h : connect to vctl on/off switch for ch2 l : shutdown h : normal operation. ctlp l : open h : connect to vctl on/off switch for the voltage detection block l: stops the voltage detection circuit h: normal operation. jp functions jp1 short-circuited in the layout pattern of the board (normally used shorted). jp2 short-circuited in the layout pattern of the board (normally used shorted). jp3 normally used shorted (0 ? ) jp6 normally used shorted (0 ? )
mb39c015 ds04-27254-2e 37 component layout on the evaluation board (top view) mb39c015evb-06 rev.1.0 r5 mode2 vrefin2 xpor vxpor vout2 pgnd pgnd vin vout1 l2 l1 c2 c1 c3 c7 c6 c5 c4 m1 vctl agnd sw1 vref mode1 vrefin1 r2 r7 r6 - 2 jp6 jp3 r4 - 2 r1 - 1 mode2 mode1 ctl2 ctl1 ctl1 ctlp vdet ctl2 ctlp r1 - 2 r4 - 1 r6 - 1 r1 - 3 r9 r8 r10 r3 jp1 jp2 short open top side (component side) bottom side (soldering side)
mb39c015 38 ds04-27254-2e evaluation board layout (top view) top side (layer1) inside vin & gnd (layer3) inside gnd (layer2) bottom side (layer4)
mb39c015 ds04-27254-2e 39 connection diagram 3 vin vin jp3 sw1* vref vref vref vin vdet vref sw1* sw1* sw1* r8 r7 r9 r5 r2 r3 r10 c7 r6-1 r6-2 r4-1 r4-2 r1-3 r1-1 r1-2 c6 c3 c4 dvdd1 dvdd2 dgnd1 dgnd2 avdd agnd lx1 out1 lx2 out2 xpor vxpor vout2 vout1 pgnd xpor agnd c5 l1 c1 c2 jp1 l2 jp2 jp6 i in i out i out pgnd vctl ctl1 ctl1 ctl2 ctlp vref vdet ctlp mode1 mode1 mode2 mode2 vrefin1 mb39c015 ctl2 vrefin1 vrefin2 vrefin2 11 12 14 15 19 20 16 17 5 4 13 10 18 21 24 9 8 2 22 23 6 7 1 sw1* * not mounted
mb39c015 40 ds04-27254-2e component list note : these components are recommended based on the operating tests authorized. fml : fujitsu microelectronics limited tdk : tdk corporation koa : koa corporation ssm : susumu co., ltd compo- nent part name model number specifica- tion package vendor remark m1 ic mb39c015qn ? qfn-24 fml l1 inductor vlf4012at-2r2m 2.2 h, rdc = 76 m ? smd tdk l2 inductor vlf4012at-2r2m 2.2 h, rdc = 76 m ? smd tdk c1 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c2 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c3 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c4 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c5 ceramic capacitor c1608jb1h104k 0.1 f (50 v) 1608 tdk c6 ceramic capacitor c1608jb1h104k 0.1 f (50 v) 1608 tdk c7 ceramic capacitor c1608jb1h104k 0.1 f (50 v) 1608 tdk r1-1 jumper rk73z1j 50 m ? max, 1 a 1608 koa r1-2 resister rr0816p-304-d 300 k ? 0.5 % 1608 ssm r1-3 jumper rk73z1j 50 m ? max, 1 a 1608 koa r2 resister rr0816p-753-d 75 k ? 0.5 % 1608 ssm r3 resister rk73g1jttd d 1 m ? 1 m ? 0.5 % 1608 koa r4-1 resister rr0816p-223-d 22 k ? 0.5 % 1608 ssm r4-2 resister rr0816p-334-d 330 k ? 0.5 % 1608 ssm r5 resister rr0816p-304-d 300 k ? 0.5 % 1608 ssm r6-1 resister rr0816p-203-d 20 k ? 0.5 % 1608 ssm r6-2 resister rr0816p-154-d 150 k ? 0.5 % 1608 ssm r7 resister rr0816p-304-d 300 k ? 0.5 % 1608 ssm r8 resister rk73g1jttd d 1 m ? 1 m ? 0.5 % 1608 koa r9 resister rk73g1jttd d 1 m ? 1 m ? 0.5 % 1608 koa r10 resister rk73g1jttd d 1 m ? 1 m ? 0.5 % 1608 koa sw1 switch ???? not mounted jp1 jumper ???? pattern- shorted jp2 jumper ???? pattern- shorted jp3 jumper rk73z1j 50 m ? max, 1 a 1608 koa jp6 jumper rk73z1j 50 m ? max, 1 a 1608 koa
mb39c015 ds04-27254-2e 41 ev board ordering information ev board part no. ev board version no. remarks mb39c015evb-06 mb39c015evb-06 rev.1.0 qfn-24
mb39c015 42 ds04-27254-2e package dimension 24-pin pl as tic qfn le a d pitch 0.50 mm s e a ling method pl as tic mold 24-pin pl as tic qfn (lcc-24p-m09) (lcc-24p-m09) c 2006-200 8 fujit s u microelectronic s limited c24059 s -c-2- 3 index area (.157.004) 4.000.10 4.000.10 (.157.004) 2.700.10 (.106.004) 2.700.10 (.106.004) 3 -r0.20 ( 3 -r.00 8 ) 0.50(.020) typ (.016.004) 0.400.10 1pin corner (c0.25(c.010)) 0.250.05 (.010.002) max 0. 8 5(.0 33 ) 0.20(.00 8 ) 0.00(.000) min 0.0 8 (.00 3 ) dimen s ion s in mm (inche s ). note: the v a l u e s in p a renthe s e s a re reference v a l u e s .
mb39c015 ds04-27254-2e 43 contents page - description ................................... ........................................... ...................... ......................... ....................... 1 - features ........................................ ............................... ............................ .......................... ............................. 1 - applications ....................................... ............................ .............................. ............................ ..................... 1 - pin assignment ..................................... .......................................... .............................................. ................ 2 - pin descriptions ................................... ........................................... ............................................... ............. 3 - i/o pin equivalent circuit diagram ................................. ...................................... ............................ 4 - block diagram ....................................... .......................................... ............................................ ................. 5 - function of each block ...................................... ............................ .............................. ......................... 7 - absolute maximum ratings .................................... ......................................... ...................................... 9 - recommended operating conditions ............................ .................................... ............................ 10 - electrical characteristics .................................... ...................................... ...................................... 11 - test circuit for measuring typi cal operating characteristics ................................ 13 - application notes ....................................... ........................................ ...................... ........................ ......... 14 - example of standard operation characteristics ................................... ............................ 21 - application circuit examples .................................... ................................... ...................................... 29 - usage precautions .................................... ........................................... .............................................. ...... 32 - ordering information ........................................ ........................... .............................. ............................ 32 - rohs compliance information of lead (pb) free version .......................... ........................ 32 - marking format (lead free version) .............................. .................................... ............................ 33 - labeling sample (lead free version) ............................... ................................ .............................. 33 - mb39c015qn- ??? e1 recommended conditions of moisture sensitivity level ....... 34 - evaluation board specification ................................................ ................................. ...................... 35 - ev board ordering information ................................................ ................................. ...................... 41 - package dimension ....................................... ......................................... ...................... ....................... ....... 42
mb39c015 fujitsu microelectronics limited shinjuku dai-ichi seimei bldg. 7-1, nishishinjuku 2-chome, shinjuku-ku, tokyo 163-0722, japan tel: +8 1-3-5322-3347 fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ for further information please contact: north and south america fujitsu microelectronics america, inc. 1250 e. arques avenue, m/s 333 sunnyvale, ca 94085-5401, u.s.a. tel: +1-408-737-5600 fax: +1-408-737-5999 http://www.fma.fujitsu.com/ europe fujitsu microelectronics europe gmbh pittlerstrasse 47, 63225 langen, germany tel: +49-6103-690-0 fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ korea fujitsu microelectronics korea ltd. 206 kosmo tower, 1002 daechi-dong, kangnam-gu,seoul 135-280 korea tel: +82-2-3484-7100 fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ asia pacific fujitsu microelectronics asia pte ltd. 151 lorong chuan, #05-08 new tech park, singapore 556741 tel: +65-6281-0770 fax: +65-6281-0220 http://www.fujitsu.com/sg/serv ices/micro/semiconductor/ fujitsu microelectronics shanghai co., ltd. rm.3102, bund center, no.222 yan an road(e), shanghai 200002, china tel: +86-21-6335-1560 fax: +86-21-6335-1605 http://cn.fujitsu.com/fmc/ fujitsu microelectronics pacific asia ltd. 10/f., world commerce centre, 11 canton road tsimshatsui, kowloon hong kong tel: +852-2377-0226 fax: +852-2376-3269 http://cn.fujitsu.com/fmc/tw all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with sales representatives before ordering. the information, such as descriptions of f unction and application circuit examples, in this document are presented solely for t he purpose of reference to show examples of operations and uses of fujitsu microelectronics device; fujitsu microelectronics does not warrant proper operation of the device with respect to us e based on such information. wh en you develop equipment incor porat- ing the device based on such information, you must assume any responsibility arising out of su ch use of the information. fujitsu microelectronics assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of f unction and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of fujitsu microelectroni cs or any third party or does fujitsu microelectronics warrant non-i nfringement of any third-party's intellectual property right o r other right by using such information. fujitsu microelectronics assumes no liability for any infringement of the intellectual property rights or other rights of third parties which w ould result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including wit hout limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and m anufactured as contemplated (1) for use accompanying fata l risks or dangers that, unless extremely hi gh safety is secured, could have a ser ious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport contro l, medical life support system, missile la unch control in weapon system), or (2) for use requiring extremely high reliab ility (i.e., submersible repeater and artificial satellite). please note that fujitsu microelectronics will not be liable against you and/or any third party for any claims or damages arisi ng in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failure s by incorporating safety design measures into your facility and equi pment such as redundancy, fire protection, and prevention of ov er-current levels and other abnormal operating conditions. exportation/release of any products described in this document may require necessary procedures in accordance with the regulati ons of the foreign exchange and foreign trade control law of japan and/or us export control laws. the company names and brand names herein are the trademarks or registered trademarks of their respective owners. edited business & media promotion dept.

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